Portable electronic devices such as a cellular phone and a PDA, which include a liquid crystal display device, an organic electroluminescent display device, or the like, now need a further reduction in their size and weight. Along with this, downsize of a periphery of a display region, i.e., a reduction in area of a frame region of such display devices is needed, and a technology of satisfying such a need is now being researched and developed. In addition, in view of thin profile and cost effectiveness, and the like as well as the reduction in area of the frame region, display devices including a full-monolithic circuit board where a peripheral circuit needed for driving a device, such as a power source circuit, a driver circuit, and a latch circuit, and the like are arranged on a substrate is increasingly employed.
However, such a full-monolithic circuit board is manufactured by a technology of forming an integrated circuit in a periphery of a pixel region of a glass substrate. Such a technology contradicts a technology needed for the reduction in area of the frame region. As a method for the reduction in area of the frame region of the display devices including a full-monolithic circuit board, a technology of forming a multi-layer wiring in a panel is being used. For example, Patent Document 1 discloses a method for producing a wiring board including a space-saving and high function circuit on a substrate with an insulating surface, the wiring board including a multi-layer wiring structure composed of: first, second, and third wirings; first and second interlayer insulating films; and first and second contact holes.
With regard to transistors that are formed on a glass substrate, an improvement in characteristics thereof largely depends on a thickness of an interlayer insulating film formed on the transistors. For example, a top-gate thin film transistor, disclosed in Patent Document 2, includes a transistor-covering interlayer insulating film which has a stacked-layer structure in which a silicon nitride film and a silicon oxide film are stacked from a gate insulating film side in this order, the silicon nitride film having a thickness of 50 nm or more and 200 nm or less. The silicon nitride film with such a thickness is arranged as a gate insulating film-side interlayer insulating film, which allows sufficient hydrogen to be supplied from the silicon nitride film to an active layer made of polycrystalline silicon and the like for terminating a dangling bond in the active layer.    [Patent Document 1]
Japanese Kokai Publication No. 2005-72573    [Patent Document 2]
Japanese Kokai Publication No. 2003-338509